1. Field of the Invention
The present invention relates to a power semiconductor device having a current detecting function to detect the current flowing therethrough.
2. Description of the Related Arts
The power semiconductor device is that designed to provide power levels of current such as to drive a motor. There is a need to detect the current flowing through the power semiconductor device for two fundamental objects: first, to detect whether or not a load such as a motor is driven at a predetermined power level; second, to detect an overcurrent at the time of overload to thereby prevent the load and the power semiconductor device from being damaged.
Various current detecting systems have so far been proposed to achieve the above described objects. Among them, there is a power semiconductor device with a current detecting function disclosed in Japanese Laid-open Patent Publication No. 63-12175 as a highly sensitive current detecting system which does not producing no additional power loss even if the current detecting function is added to the power semiconductor device. The structure of such semiconductor device will be described below with reference to FIG. 6 showing its configuration.
Broadly speaking, the semiconductor device in FIG. 6 is formed of a current signal detecting portion 22 and a plurality of unit cells of n-channel vertical MOSFET constituting a power control portion, and the unit cell of a portion of the power control portion adjoining the current signal detecting portion 22 constitute a current signal generating portion 21.
First, with regard to the structure of the power control portion, an n.sup.- -type drain layer 2 is formed on the surface of an n.sup.+ -type substrate 1, a gate oxide film 3 is formed on the drain lasher 2 by oxidizing the surface of the drain layer 2, and a gate electrode 4 is formed on the gate oxide film patterned into a predetermined shape. By setting tap the width 11 of the gate electrode 4 using the gate electrode 4 as a mask, p-type base regions 7a are formed by diffusion in the surface of the drain layer 2 in predetermined regions at predetermined intervals, and n.sup.+ -type source regions 8a are formed by diffusion in the p-type base regions 7a.
A portion near the surface of the p-type base region 7a where the n.sup.+ -type source region 8a is not formed becomes a channel 9a. The gate electrode 4 is covered by an interlayer insulating film 5. A source electrode 6a is formed in ohmic contact with the surface of the n.sup.+ -type source region 8a and the p-type base region 7a . A drain electrode 10 is formed in ohmic contact with the reverse of the n.sup.+ -type substrate 1 and the drain electrode 10 is connected with a drain terminal D. The source electrode 6a is connected with a source electrode S and the gate electrode 4 is connected with a gate electrode G.
Then, with regard to the structure of the current signal detecting portion 22, the width 12 of the gate electrode 4 is set up using, as a mask, the gate electrode 4 patterned into a predetermined shape, and thereby, a p-type shield region 7b is formed by diffusion in the surface of the n.sup.- -type drain layer 2 in a region a predetermined distance apart from the channel 9a, and n.sup.+ -type probe regions 8b are formed by diffusion in the p-type sealed region 7b. A portion near the surface of the p-type shield region 7b where the n.sup.+ -type probe region 8b is not formed becomes a channel 9b.
The surface of the p-type shield region 7b is in ohmic contact with the source electrode 6a. The probe region 8b is in ohmic contact with a probe electrode 6b, which in turn is in connection with a probe terminal P.
The principle of current detection in the semiconductor device with a current detecting function shown in FIG. 6 is such that utilizes the channel resistance of the vertical MOSFET of a double diffusion type as current detecting means. Referring to FIG. 6, the path of the flow of electrons as carriers flowing through the device goes, as indicated by the path 30, by way of the source terminal S .fwdarw. source electrode 6a .fwdarw. source region 8a .fwdarw. channel 9a .fwdarw. n.sup.- -type drain layer 2 .fwdarw. n.sup.+ -type substrate 1 .fwdarw. drain electrode 10 .fwdarw. drain terminal D.
The path for detecting the voltage drop developed across the channel resistance of the channel 9a goes, as shown by the path 31, by way of the accumulation region 11 .fwdarw. channel 9b .fwdarw. n.sup.+ -type probe region 8b .fwdarw. probe electrode 6b .fwdarw. probe terminal P, and the voltage drop across the channel resistance of the channel 9a is output between the probe terminal P and the source terminal S. Since the n.sup.+ -type probe region 8b is electrically shielded by the p-type shield region 7b from the regions such as the n.sup.- -type drain layer 2 where voltage and current greatly change, there is a merit that current detection with less noise and higher S/N ratio can be achieved at the probe terminal P.
However, the conventional art utilizing the channel resistance as the current detection means as shown in FIG. 6 has the following points of problem:
(1) since the channel resistance varies with temperature, it is difficult to perform the current detection with high accuracy; and
(2) since the channel resistance varies according to the gate voltage, it is difficult to perform the current detection with high accuracy under the condition of inconstant gate voltage.